Bus bridge architecture for a data processing system capable of

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

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710128, 370402, G06F 1300, G06F 1340

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active

060650850

ABSTRACT:
The method and apparatus provides a data processing system. The data processing system includes a primary bus, a secondary bus, and a host processor connected to the primary bus. The data processing system includes a first secondary processor connected to the primary bus and the secondary bus. Additionally, a second secondary processor is connected to the secondary bus. The first secondary processor and the second secondary processor forms cascaded processors for input/output functions. Selected functions normally performed by the second secondary processor are performed by the first secondary processor, wherein a division of workload increases performance of the data processing system. This architecture allows shifting of workload down to the secondary bus.

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