Bus bridge apparatus

Details Bus bridge apparatus Bus bridge apparatus

1997-06-17

1999-11-02

Auve, Glenn A.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710110, G06F 1300

Patent

active

059788798

ABSTRACT:
A bus bridge apparatus that connects two system buses independent of each other to which a bus arbiter operating independently and located outside of the apparatus, has a function for serving as a master and a slave of the system buses, a base address holding means, and a bus address generating means. When, to access a slave device on a first system bus, a master device on a second system bus attempts to access the apparatus, generating offset from addresses received from the master device and combining the offset with base addresses previously stored in said base address holding means, to generate an access destination address in the slave device by using said bus address generating means, this bus bridge apparatus performs functions: (i) issuing the generated access destination address by serving as a bus master on the first system bus, to access the slave device; and (ii) performing data transfer between the master device and the slave device by serving as a slave of the master device on the second system bus. It is thus possible to realize mutual access between system buses having an independent arbitration function, without changing system design.

REFERENCES:
patent: 5717873 (1998-02-01), Rabe et al.
"DEC Chip 21050 PCI-to-PCI Bridge Data Sheet (First Edition, Dec. 1993)".

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