Bus arbitration system having both round robin and daisy...

Details Bus arbitration system having both round robin and daisy... Bus arbitration system having both round robin and daisy...

1998-02-26

2001-10-30

Beausoleil, Robert (Department: 2781)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral adapting

C710S120000, C710S241000

Reexamination Certificate

active

06311249

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to computer systems, and more particularly, to a bus arbitration system suitable a variety of input and output devices of different characteristics.
2. Discussion of the Related Art
A conventional bus arbitration system will be described with reference to the accompanying drawings.
FIG. 1
shows a conventional bus arbitration system according to daisy-chain mode.
As illustrated in
FIG. 1
, the conventional bus arbitration system according to daisy-chain mode includes a plurality of arbiters connected to one another in series with a sequential priority order, and a bus busy line connected to the respective arbiters.
Output terminals PO of the respective arbiters are respectively connected to input terminals PI of their successive arbiters. The respective arbiters are connected to a bus line.
Such a bus arbitration system allows the respective arbiters to use the bus line sequentially. In other words, the bus arbitration system allows a first arbiter to use the bus line firstly and also allows the last arbiter to use the same lastly. The bus arbitration system allows the arbiter at the next level to use the bus line if the first arbiter does not request to use the same.
In this respect, if any one of a plurality of the arbiters has an input value “1” and does not request to use the bus line (that is, if it does not request interrupt), it has an output value “1”. The output value “1” is transferred to the input terminal of the successive arbiter.
Meanwhile, if any one of a plurality of the arbiters has an input value “1” and requests to use the bus line, it has an output value “0” and has the priority capable of using the bus line. Then, the arbiter recognizes the bus busy line. If the other device uses the bus line, the arbiter uses the bus line after the other device completed its use. If the other device does not use the bus line, the arbiter can directly use the same.
At this time, the arbiter which once had the priority has the last priority order.
Other conventional bus arbitration system which adopts round-robin mode will be described with reference to FIG.
2
.
Referring to
FIG. 2
, a plurality of priority request signals (request signals for use of a bus line) are separately input to a first logic gate
21
and a second logic gate
22
. The priority request signals passed through the first and second logic gates
21
and
22
are connected to a first round-robin arbiter
23
. Here, the priority request signals from the first logic gate
21
are separately input to third and fourth logic gates
24
and
25
, and the priority request signals from the second logic gate
22
are separately input to fifth and sixth logic gates
26
and
27
.
Output signals of the third and fourth logic gates
24
and
25
are connected to a second round-robin arbiter
28
, and output signals of the fifth and sixth logic gates
26
and
27
are connected to a third round-robin arbiter
29
. At this time, output signals of the third round-robin arbiter
29
act as enable signals of the second and third round-robin arbiters
28
and
29
.
The priority is determined by a first level corresponding to the first round-robin arbiter
23
and a second level corresponding to the second and third round-robin arbiters
28
and
29
. The priority of the second level is determined as below.
Two adjacent request signals of a plurality of the priority request signals are respectively input to fourth, fifth, sixth and seventh round-robin arbiters
30
,
30
a,
30
b
and
30
c.
The fourth, fifth, sixth and seventh round-robin arbiters
30
,
30
a,
30
b
and
30
c
at the last level are half of the input priority request signals. The fourth, fifth, sixth and seventh round-robin arbiters
30
,
30
a,
30
b
and
30
c
selectively output a final priority request signal.
Such a bus arbitration system of round-robin mode evenly gives the respective devices the priority.
The conventional bus arbitration systems as aforementioned have several problems.
A plurality of the devices connected to the bus line have different characteristics. For example, any one of a plurality of the devices tends to use the bus line frequently or urgently as compared to the other devices. In this case, it is difficult for the respective devices to use the bus line to be suitable for their characteristics because the priority is evenly given to all of the devices.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a bus arbitration system that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a bus arbitration system which improves throughput of bus arbitration by giving a variety of devices the priority suitable for their characteristics.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a bus arbitration system according to the present invention includes a first priority grant signal determination part for primarily determining a priority grant signal among two groups including a plurality of priority request signals, and a second priority grant signal determination part for finally outputting the priority grant signal among the priority request signals enabled by the first priority grant signal determined from the first priority grant signal determination part. Here, the first and second priority grant signal determination parts include both round-robin arbiter and a daisy-chain arbiter organically.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 4314335 (1982-02-01), Pezzi
patent: 4641266 (1987-02-01), Walsh
patent: 5088024 (1992-02-01), Vernon et al.
patent: 5499345 (1996-03-01), Watanabe
patent: 5519837 (1996-05-01), Tran
patent: 5581782 (1996-12-01), Sarangdhar et al.
patent: 5583999 (1996-12-01), Sato et al.
patent: 5729702 (1998-03-01), Creedon et al.
patent: 5832278 (1998-11-01), Pham

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