Bus agent having multiple reference levels

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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C326S026000

Reexamination Certificate

active

07113000

ABSTRACT:
An integrated circuit is configured as a selected one of a terminated and a non-terminated bus agent for terminating a bus signal line. Reference level selection logic selects one of a first and a distinct second reference level as a selected level. The integrated circuit compares the bus signal line with the selected level to determine the state of the bus signal line.

REFERENCES:
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Ilkbahar, Alper et al., “Itanium Processor System Bus Design”, IEEE Journal of Solid State Circuits vol. 36, No. 10, Oct. 2001, pp. 1565-1573.
Sledjeski, Lee, “Considerations for Bus Termination in Computing Systems”, International IC '99 Conference Proceedings, 1999, pp. 223-228, no month.
Gabara, Thaddeus J., et al., “Forming Damped LRC Parasitic Circuits in Simultaneously Switched CMOS Output Buffers”, IEEE Journal of Solid State Circuits, vol. 32, No. 3, Mar. 1997, pp. 407-418.

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