Burst mode end detection unit

Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying

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Details

375340, G06F 1312, G06F 1314

Patent

active

059251131

ABSTRACT:
A burst mode end detection unit comprising a first decoding circuit for pre-decoding external burst length data, a plurality of counters being reset in response to a reset signal to generate different counts in response to a clock signal in such a manner that the counts are sequentially incremented by one, the reset signal being generated when a burst mode is designated, a second decoding circuit for decoding output signals from the counters, and a comparison circuit for comparing an output signal from the first decoding circuit with an output signal from the second decoding circuit and detecting an end time of the burst mode in accordance with the compared result. According to the present invention, the burst mode end detection unit can accurately detect the end time of the burst mode and notify a synchronous DRAM of the detected burst mode end time. Therefore, the synchronous DRAM can rapidly perform the subsequent operation.

REFERENCES:
patent: 4275440 (1981-06-01), Adams
patent: 4458357 (1984-07-01), Weymouth
patent: 5497377 (1996-03-01), Muto et al.
patent: 5649125 (1997-07-01), Tietjen et al.
patent: 5675549 (1997-10-01), Ong
patent: 5675974 (1997-10-01), Motamadi

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