Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Patent
1994-09-02
1996-06-04
Limanek, Robert P.
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
257727, 257704, 257680, 257707, 437 8
Patent
active
055235867
ABSTRACT:
A burn-in socket for carrying out a burn-in test for semiconductor bare chips according to the present invention includes a chip container, a cover member, and clamp jigs for fixing the cover member to the upper portion of the chip container. The chip container has a recess capable of setting bare semiconductor chips to undergo the burn-in test. The chip container also has internal electrodes and external electrodes connected to the internal electrodes. The cover member is constituted by fixing an inexpensive TAB tape, which can be finely processed, to a transparent member formed of glass or the like. The chip electrodes of the semiconductor chip set in the recess of the chip container are electrically connected to the internal electrodes of the chip container by using the leads of the TAB tape fixed to the cover member. The alignment of the leads, chip electrodes, and internal electrodes is easily performed by seeing through the TAB tape from the cover member. By doing so, the cost of the socket itself and the operation cost required for the burn-in test can be decreased, with the result that these costs can be prevented from influencing the cost of defect-free semiconductor bare chips, and the defect-free semiconductor bare chips whose reliability has been confirmed can be obtained at low cost.
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patent: 5414370 (1995-05-01), Hashinga et al.
Hardy David B.
Kabushiki Kaisha Toshiba
Limanek Robert P.
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