Buried structure SRAM cell and methods for fabrication

Details Buried structure SRAM cell and methods for fabrication Buried structure SRAM cell and methods for fabrication

1995-07-12

1998-10-13

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Fet configuration adapted for use as static memory cell

257904, 257382, 257401, H01L 2711

Patent

active

058216294

ABSTRACT:
An improved SRAM cell having ultra-high density and methods for fabrication are described. Each SRAM cell, according to the present invention, has its own buried structure, including word lines (i.e., gate regions) and bit lines (i.e., source/drain regions), thus increasing the cell ratio of channel width of cell transistor to that of pass transistor to keep the data stored in the cell transistor more stable without increasing the area per cell. In addition, according to the present invention, the field isolation between active regions is not field oxide but blankly ion-implanted silicon substrate. Therefore, SRAM cells can be densely integrated due to the absence of bird's beak encroachment. Since the present invention has more planar topography than the prior art, it is easily adapted to the VLSI process, which is always restricted by the limit of resolution of photolithography, thus increasing the degree of integration.

REFERENCES:
patent: 5166763 (1992-11-01), Wada et al.
patent: 5258635 (1993-11-01), Nitayama et al.
patent: 5324973 (1994-06-01), Sivan

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