Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2010-07-26
2011-11-01
Sarkar, Asok (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S621000, C257S740000, C257SE23019, C257SE23157
Reexamination Certificate
active
08049334
ABSTRACT:
A buried local interconnect and method of forming the same counterdopes a region of a doped substrate to form a counterdoped isolation region. A hardmask is formed and patterned on the doped substrate, with a recess being etched through the patterned hardmask into the counterdoped region. Dielectric spacers are formed on the sidewalls of the recess, with a portion of the bottom of the recess being exposed. A metal is then deposited in the recess and reacted to form silicide at the bottom of the recess. The recess is filled with fill material, which is polished. The hardmask is then removed to form a silicide buried local interconnect.
REFERENCES:
patent: 4962414 (1990-10-01), Liou et al.
patent: 5162259 (1992-11-01), Kolar et al.
patent: 6261908 (2001-07-01), Hause et al.
patent: 2004/0038517 (2004-02-01), Kang et al.
patent: 2005/0112831 (2005-05-01), Surdeanu
Buynoski Matthew S.
Halliyal Arvind
Krivokapic Zoran
Ngo Minh Van
Ogura Jusuke
Advanced Micro Devices , Inc.
Sarkar Asok
Volpe and Koenig P.C.
LandOfFree
Buried silicide local interconnect with sidewall spacers and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Buried silicide local interconnect with sidewall spacers and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Buried silicide local interconnect with sidewall spacers and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4254463