Buried-sidewall-strap two transistor one capacitor trench cell

Details Buried-sidewall-strap two transistor one capacitor trench cell Buried-sidewall-strap two transistor one capacitor trench cell

1993-01-19

1994-11-08

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Capacitors

365182, 257301, G11C 1300

Patent

active

053633270

ABSTRACT:
A two transistor one capacitor DRAM cell configured with respect to a bit line pair and a single word line in which the gates of the two transistors are connected to the single word line and one of the source/drains of each transistor is connected to a respective electrode of the capacitor and the other of the source/drains of the transistors is connected to a respective bit line of a complementary bit line pair. The storage capacitor is a three dimensional structure with both electrodes being electrically well isolated from electrodes of all other cell storage capacitors. A stacked in trench cell fabrication design is disclosed having a buried strap for connecting the outer electrode to a diffusion region of one transistor and a surface strap for connecting the inner electrode to a diffusion region of the second access transistor.

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