Buried n.sup.- channel implant for NMOS transistors

Details Buried n.sup.- channel implant for NMOS transistors Buried n.sup.- channel implant for NMOS transistors

1985-10-21

1987-10-20

Edlow, Martin H.

357 42, 357 91, 357 90, 357 89, H01L 2978, H01L 2702

Patent

active

047017759

ABSTRACT:
A deep, buried n.sup.- channel blanket implant beneath both n.sup.- channel and p-channel devices in MOS integrated circuits, whether complementary MOS (CMOS) or not. It is known to use deep, lightly-doped n.sup.- channel implant to improve the characteristics of p-channel (PMOS) devices, although one skilled in the art would expect such an n.sup.- implant to be detrimental to n-channel (NMOS) devices. It has been discovered that such implants not only do not degrade the NMOS devices, but in fact improve their performance, with respect to body effect and junction capacitance.

REFERENCES:
patent: 4053925 (1977-10-01), Burr et al.
patent: 4247860 (1981-01-01), Tihanyi
patent: 4276095 (1981-06-01), Beilstein, Jr. et al.

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