Buried contact between polysilicon gate and diffusion area

Details Buried contact between polysilicon gate and diffusion area Buried contact between polysilicon gate and diffusion area

1991-08-22

1993-04-27

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257380, 257754, 257756, 257904, H01L 2904, H01L 2702

Patent

active

052065324

ABSTRACT:
A buried contact between the gate of a transistor device formed at the surface of a semiconductor substrate and a diffusion region formed in the surface of the substrate remote from the transistor device. The buried contact includes a polysilicon interconnect structure formed after shaping of the gate layer and the gate insulator. The polysilicon interconnect structure engages a side edge and an adjoining lower surface of the gate layer at a location where the gate insulator has been removed by isotropic etching from between the gate layer and the surface of the substrate. The polysilicon interconnect layer also contacts the surface of the substrate beneath an overhanging edge of the gate layer so as to form a surface current pathway interface. Below the surface current pathway interface a migration region is formed by heat-induced movement of ions from the gate layer through the polysilicon interconnect structure. The migration region extends laterally away from the gate layer to make contact with a remote diffusion region, thereby effecting with the polysilicon interconnect structure the desired buried contact.

REFERENCES:
patent: 4413402 (1983-11-01), Erb
patent: 4939104 (1990-07-01), Pollack et al.

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