Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-06-26
2003-06-24
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S282000, C438S424000, C438S228000, C438S449000, C257S141000, C257S222000, C257S066000, C257S194000, C257S223000
Reexamination Certificate
active
06583044
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to micro-machining, and more particularly, but not by way of limitation, to a buried channel in a substrate and a low temperature, low-cost method of fabricating the same.
2. Description of the Related Art
Many different technologies have benefited from advances in micro-machining, and as micro-machining becomes less expensive and more commonplace, more applications will come about. One common structural feature in a device made by micro-machining is a buried channel. Buried channels are used throughout the electrical, chemical, and biochemical fields, for instance in microfluidic and gas applications. In many instances it is desirable that the buried channel be monolithically integrated with other devices, such as electronics, sensors, and micro plumbing, for example micro-machined valves and pumps. Also, in many applications the device incorporating the buried channel is better suited for its application if it is a consumable. Thus, efforts are taken to minimize the overall cost of fabricating the device, and using low-cost methods of fabricating its features, such as a buried channel, help minimize the cost.
Most methods for fabricating buried channels require many steps, and thus are not low-cost. Those that are low-cost may not be suited for monolithic integration with other devices. One low-cost method for fabricating a buried channel is described in U.S. Pat. No. 6,031,286 by Levine et al. This method involves depositing a film into an open trench. The film lines the sidewalls and bottom of the trench, and builds up covering over the top. With this method it is necessary that the trench have a depth that is much greater than its width, for example a 2:1 aspect ratio, so that the filler material will close off the trench. However, it is difficult to control the shape of the resulting buried channel, and fabricating a buried channel with this method may result in a channel that is not an optimum shape. Also, this method requires a substantial thickness in the layer of material covering the trench, and thus the method is limited by the ultimate attainable thickness of the covering material.
Therefore, there remains a continued need for a method of fabricating a buried channel that is low-cost. It is desirable that the method enable fabrication of large channels, maximizing the channel size attainable for a given thickness of material. It is also desirable that the method be suitable for low temperature fabrication techniques to enable the use of a broader range of materials, including inexpensive polymers. Further, the method should allow monolithic integration of the buried channel with other devices.
SUMMARY OF THE INVENTION
The invention is a low-cost method of fabricating a buried channel in a substrate. The method includes depositing a layer of masking material onto the surface of a substrate. A groove is etched through the masking material to expose the substrate. A channel is etched into the substrate through the groove. A covering layer is deposited over the masking layer and groove such that the covering layer, at least substantially, covers over the groove.
Etching a channel can comprise using an isotropic etchant to etch an undercut into the substrate beneath the masking layer. Etching can comprise etching with an anisotropic etchant chosen to etch primarily downward into the substrate, and etching with an isotropic etchant to etch undercuts beneath the masking layer. Etching with an anisotropic etchant can be performed before the step of etching with an isotropic etchant. Etching of a channel can further comprise etching with an anisotropic etchant chosen to etch primarily along a crystal plane of the substrate which is not perpendicular to the surface of the substrate. The cover layer can be deposited such that the layer is conformal so that a portion of the cover layer material deposits in the channel and forms a passivating layer in the channel. The groove can further be etched with sidewalls which slope inward and downward. The method can further comprise applying a second cover layer over the first cover layer and groove to completely close off the groove. The second cover layer can be spun-on. Depositing the cover layer can further comprise controlling the thickness of the cover layer to leave an opening of a pre-determined width above the groove to create a sieve. The method can further comprise etching a portion of the cover layer over the groove to create an opening of a pre-determined width to create a sieve. The method can also comprise etching a portion of the cover layer into the channel to create a via. Etching a groove can further comprise etching the groove up to a point of access of a monolithically integrated device. The method can further include etching an access point for a monolithically integrated device through the cover layer and into the channel.
The method of the invention can utilize low temperature processing techniques in fabricating the buried channel, and also allows monolithically integrating the channel with other devices. The method of invention enables fabrication of larger buried channels than would otherwise be possible with a given covering material thickness
The invention is also drawn to a buried channel in a substrate. The substrate includes a channel open to the surface of the substrate. A first layer is located on the surface of the substrate and over the channel. The first layer has a groove therein that follows at least a portion of the channel. A second layer is located on top of the first layer and at least substantially covers over the groove.
REFERENCES:
patent: 5932315 (1999-08-01), Lum et al.
patent: 5992769 (1999-11-01), Wise et al.
patent: 6031286 (2000-02-01), Levine et al.
patent: 6093330 (2000-07-01), Chong et al.
Article entitled “Localized GaAs Etching with Acidic Hydrogen peroxide Solutions,” dated Apr. 1981, vol. 128, No. 4 of the Journal of Electrochemical Society, (8 pages).
Bahl Sandeep
Seaward Karen L.
Anya Igwe U.
Smith Matthew
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