Buried bit line ROM with low bit line resistance

Details Buried bit line ROM with low bit line resistance Buried bit line ROM with low bit line resistance

1993-07-14

1995-07-04

Nguyen, Viet Q.

Static information storage and retrieval

Systems using particular element

Semiconductive

257302, 257377, 257368, 257321, H01L 2710, H01L 2978

Patent

active

054306736

ABSTRACT:
A ROM array comprises orthogal sets of buried bit lines and polysilicon wordlines. The buried bit lines comprise trenches with insulating material on the side walls, the trenches then being filled with polysilicon. Theis reduces bit line sheet resistance and increases the punch through voltage between adjacent bit lines.

REFERENCES:
patent: 4222062 (1980-09-01), Trotter et al.
patent: 4912535 (1990-03-01), Okumura
patent: 5017977 (1992-05-01), Richardson
patent: 5278438 (1994-01-01), Kim et al.

Affiliated with

Also associated with

Rating

Buried bit line ROM with low bit line resistance does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Buried bit line ROM with low bit line resistance, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Buried bit line ROM with low bit line resistance will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-765683