Bumping process

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S613000, C438S614000, C438S615000

Reexamination Certificate

active

06930031

ABSTRACT:
A bumping process is disclosed. The bumping process comprises the steps of: providing a wafer having a plurality of bonding pads and a passivation layer, wherein the passivation layer exposes the bonding pads; forming an UBM layer over the wafer to cover the bonding pads; forming two or more photoresist layers over the wafer, wherein the photoresist layers have different exposure and development characteristics; forming at least one or more stair-shaped openings in the photoresist layers by a single exposure corresponding to the bonding pads; filling solder into the stair-shaped openings to form a plurality of solder bumps; removing the entire photoresist layer. The bumping process can provide bumps with higher heights, so that the connection between chips and carriers becomes more reliable.

REFERENCES:
patent: 6372622 (2002-04-01), Tan et al.
patent: 6486054 (2002-11-01), Fan et al.
patent: 6602775 (2003-08-01), Chen et al.
patent: 6649507 (2003-11-01), Chen et al.

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