Bumped semiconductor device having a trench for stress relief

Details Bumped semiconductor device having a trench for stress relief Bumped semiconductor device having a trench for stress relief

1998-06-15

1999-08-24

Chaudhari, Chandra

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

257737, 257738, 257780, H01L 2348, H01L 2144

Patent

active

059435976

ABSTRACT:
A bumped semiconductor device including bond pad (12) formed on a semiconductor die (10), and a passivation layer (14) overlying the semiconductor die and a portion of the bond pad (12). A solder bump (22) is formed so as to overlie the bond pad (12), and a stress isolation trench (15) is formed in the passivation layer (14), so as to surround the solder bump (22).

REFERENCES:
patent: 4048438 (1977-09-01), Zimmerman
patent: 5821608 (1998-10-01), DiStephano et al.
patent: 5834374 (1998-11-01), Cabral, Jr. et al.
patent: 5834848 (1998-11-01), Iwasaki
patent: 5844782 (1998-12-01), Fukasawa
patent: 5847456 (1998-12-01), Shoji

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