Bump structure of semiconductor package and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S780000, C257SE23021, C257SE21508, C438S613000

Reexamination Certificate

active

11026919

ABSTRACT:
A bump structure of a semiconductor package and a method for fabricating the same are provided. The bump structure is used to connect a semiconductor element to a carrier of the semiconductor package. The fabrication method primarily employs an electroplating process to form the bump structure including an under bump metallurgy (UBM) layer, at least one I-shaped conductive pillar, and a solder material. This allows fine-pitch electrical connection pads to be arranged in the semiconductor package, and also provides an enhanced support structure and a sufficient height between the semiconductor element and the carrier.

REFERENCES:
patent: 2005/0121804 (2005-06-01), Kuo et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Bump structure of semiconductor package and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bump structure of semiconductor package and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bump structure of semiconductor package and method for... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3768634

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.