Bump pattern design for flip chip semiconductor package

Details Bump pattern design for flip chip semiconductor package Bump pattern design for flip chip semiconductor package

2006-08-01

2008-11-04

Williams, Alexander O (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

On insulating carrier other than a printed circuit board

C257SE23010, C257S690000, C257S737000, C257S693000, C257S774000, C361S755000, C361S783000, C361S777000, C361S754000, C324S754090, C324S760020, C324S755090

Reexamination Certificate

active

07446398

ABSTRACT:
A bump pattern design for flip chip semiconductor packages includes a pattern of contact pads formed on a package substrate. Each contact pad is adapted to receive a corresponding solder bump from a semiconductor chip attached thereto. The pattern includes a central portion and a peripheral portion with a transition portion therebetween. The transition portion has a lower pattern density than the central portion and peripheral portions. In the peripheral portion is at least one outer portion having a pattern density less than the average pattern density of the central portion. The outer portions of reduced pattern density may be the corner sections in a rectangular bump pattern and may further include channels that are void of contact pads. The peripheral portion may include an average pitch between most of the rows and columns, but also an increased pitch between some adjacent rows and columns.

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Amkor Technology, Enabling Technologies, “Flip Chip Packaging Technology Solution” at http://www.amkor.com/enablingtechnologies/FlipChip/index.cfm, Jul. 12, 2006, 8 pages.

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