Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2003-01-06
2004-04-13
Gurley, Lynne (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S613000, C438S614000, C438S615000
Reexamination Certificate
active
06720243
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the priority benefit of Taiwan application Ser. No. 91100098, filed Jan. 7, 2002.
BACKGROUND OF INVENTION
1. Field of the Invention
The present invention relates to a bump fabrication method, and in particular, a method of forming good quality bumps, avoiding etching the solder layer pattern after the exposed wetting layer, barrier layer, and adhesion layer have been removed.
2. Description of the Related Art
The so-called bump fabrication method commonly used in flip chip technology is the formation of Under Ball Metallurgy (UBM) on the external connection point on a wafer. A wafer bump is formed on the under ball metallurgy, and finally, the wafer bump is directly connected to the substrate.
General UBM is used as an interface between the bump and the pad and therefore, the UBM must possess low stress, good adhesion, strong corrosive resistance and excellent wetting properties. Normally, a UBM comprises three layers of metals. Each respectively improves the bonding between the metal and the adhesion layer, improves the wetting layer of the bump, and provides a barrier layer in between two layers. The function of the barrier layer is to prevent a particle of the adhesion layer from penetrating the wetting layer, or to avoid a particle of the wetting layer penetrating the adhesion layer.
In the conventional method of fabricating bumps, after a solder layer is electroplated, the solder layer is used as a mask, and an etching method is used to remove the wetting layer and the barrier layer, and then the adhesion layer. Finally, by employing a re-flow process, the solder layer is formed into a bump. However, in the course of removing the barrier layer, due to the nitric acid contained in the etching solution, the solder layer being used as a mask is also etched when the wetting layer and the barrier layer are removed.
When the solder layer is etched by the etching solution two problems will arise.
(1) If the etching solution etches the surface of the solder layer, the volume of the solder layer is insufficient so that the height difference of the bump after a re-flow process increases, and the object of the external connection of the bump may not be achieved.
(2) When the etching solution etches the bottom of the solder layer, the connection face between the solder layer and the UBM will decrease. This will reduce the bonding force between the solder layer and the UBM, and further, the solder layer may be stripped off.
A conventional method of fabrication bumps is described as follows: Referring to
FIGS. 1
to
7
, together with
FIG. 8
, wherein
FIGS. 1
to
7
are sectional views showing the conventional method of fabricating bumps, and
FIG. 8
is a flowchart block diagram showing a conventional method of fabricating bumps.
As shown in
FIG. 1
, the conventional method first provides a wafer
100
(S
100
of
FIG. 8
) having a plurality of pads
102
and a passivation layer
104
covering the surface of the pad
102
, and exposing the pad
102
. On the surface of the wafer
100
, an adhesion layer
106
, a barrier layer
108
, and a wetting layer
110
(S
102
of
FIG. 8
) are formed. As shown in
FIG. 2
, a patterned photoresist layer
124
is formed to cover the surface (S
104
of
FIG. 8
) of the wetting layer
110
. This patterned photoresist layer
124
is provided with a plurality of openings
126
exposing the wetting layer
110
.
As shown in
FIG. 3
, the openings
126
are electroplated with a solder layer
114
(S
106
of FIG.
8
).
FIG. 4
shows the removal of patterned photoresist layer
124
(S
108
of FIG.
8
). As shown in
FIG. 5
, the solder layer
114
is used as a mask to remove the wetting layer
110
and the barrier layer
108
(S
110
of FIG.
8
). Next, as shown in
FIG. 6
, the solder layer
114
is used as a mask to remove the adhesion layer
106
(S
112
of FIG.
8
). Finally, as shown in
FIG. 7
, a re-flow process (S
114
of
FIG. 8
) is performed, and the solder layer
114
is formed into a bump
116
, wherein the steps of S
110
and S
112
can be combined into a single step.
When the solder layer
114
is used as a mask to remove the wetting layer, the barrier layer and the adhesion layer (as shown in FIG.
6
), due to the nitric acid contained in the etching solution, the solder layer will be etched and this will cause an insufficiency with respect to the volume of the solder layer, so that the height difference of the bump after a re-flow process increases, and the bonding force of the solder layer and the UBM is reduced, so that the solder layer may be stripped off.
SUMMARY OF INVENTION
Accordingly, it is an object of the present invention to provide a bump fabrication method, wherein in the course of etching the barrier layer, the solder layer will not be etched, and the height difference of the bump after a re-flow process is maintained to a limited range, and the bonding force between the bump and the UBM remains excellent, which provides excellent bump quality.
Another object of the present invention is to provide a bump fabrication method, comprising the steps of providing a wafer having a plurality of bump pads and a passivation layer on the surface of the wafer and exposing the bump pads; forming an adhesion layer, a barrier layer and a wetting layer in sequence on the surface of the wafer; defining the wetting layer and the barrier layer to form a plurality of Under Ball Metallurgy (UBM) patterns exposing the adhesion layer, wherein the UBM patterns correspond to each of the bump pads; forming a plurality of solder layer patterns on the surface of the UBM patterns, wherein each of the solder layer patterns corresponds to the UBM patterns; removing the exposed adhesion layer; and performing a re-flow process to form a bump on the solder layer pattern, wherein the wafer is provided with a plurality of pads, each UBM pattern respectively corresponding to each of the pads, and each solder layer pattern respectively corresponding to each of the UBM patterns.
In accordance with an aspect of the present invention, prior to forming the solder layer pattern, the wetting layer and the barrier layer are removed, and after a solder layer pattern is formed, only the exposed adhesion layer is removed, avoiding etching the solder layer pattern in the course of etching the solder layer and the barrier layer, and therefore the volume of the required solder layer pattern can be maintained. Thus, the height of the bump after the re-flow process is maintained at an appropriate range and the required bonding force between the bump and the under ball metallurgy layer pattern can be maintained so as to improve the reliability.
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patent: 5937320 (1999-08-01), Andricacos et al.
patent: 6232212 (2001-05-01), Degani et al.
patent: 6624060 (2003-09-01), Chen et al.
patent: 2002/0173134 (2002-11-01), Viswanadam et al.
patent: 2003/0134498 (2003-07-01), Chen et al.
patent: 2003/0157438 (2003-08-01), Tong et al.
patent: 2003/0157789 (2003-08-01), Tong et al.
Advanced Semiconductor Engineering Inc.
Gurley Lynne
Jiang Chyun IP Office
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