Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1999-10-05
2002-09-24
Cuneo, Kamand (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S267000, C361S768000, C361S771000, C228S180220, C257S738000
Reexamination Certificate
active
06455785
ABSTRACT:
TECHNICAL FIELD
The present invention relates to electrical connections and a method and an apparatus for forming such connections. More particularly, it relates to the structure of such a connection and a method in which a component, e.g., a semiconductor chip, is directly connected to a conductor formed on a package substrate.
BACKGROUND OF THE INVENTION
Various methods of directly connecting components such as semiconductor chips to an electrode such as a circuit pad conductor formed on a package substrate, e.g., a printed circuit board (PCB), have been conventionally proposed and practiced. As one of these conventional methods, there has been disclosed a method of forming a projecting electrode, as shown in
FIG. 25
, which includes an upper layer
3
a
of gold or the like formed in a wafer state by a plating method and a lower layer
3
b
of solder or the like having an eutectic composition stacked on the upper layer
3
a
by a plating method (Japanese Laid-Open Patent Publication No. 9-97791).
After forming the electrode in this manner, the wafer is divided into individual semiconductor chips for use in a packaging process, and good chips alone undergo a subsequent procedure while defected chips are scrapped. In the packaging process, by using a semiconductor chip having the projecting electrodes on it, the projecting electrodes formed on the semiconductor chip
6
are positioned in accordance with electrodes
5
formed on the respective, receiving substrate
4
. Then, the semiconductor chip
6
is connected to the electrode
5
of the package substrate
4
, typically using flux and heating the structure in a reflow furnace.
However, since it is necessary to conduct the plating in a wafer state in this method, if the wafer includes a small number of good chips, the manufacturing unit cost per semiconductor chip becomes relatively higher, and hence, the method cannot always be practically adopted. Furthermore, when problems arise in the procedure for forming the projecting electrodes by the plating method, there is no recovering means. Therefore, the problematic wafer is unavoidably abandoned. In addition, since a wafer is divided into semiconductor chips after forming the projecting electrodes, a wafer having a defect caused in the dividing process is also discarded. Moreover, in the procedure for forming the projecting electrodes by the plating method, various metallic ions can often be mixed in the plating bath used. Therefore, impurities can be deposited in the upper and lower layers, possibly causing a connection failure.
Another technique is disclosed in Japanese Patent Publication No. 4-65534. In this technique, a fine wire is obtained by rapidly solidifying an alloy including a main component of Pb, Sn or In and another additional element. The wire is heated to form a ball, and then it is pulled under the condition where the ball is adhered onto an electrode. The wire is thus cut at the base of the ball, resulting in forming a connection structure. Through this structure, a semiconductor device can then be connected, e.g., to the substrate having the electrode thereon and thus possibly to further substrates, components, etc., in a larger operating system. Owing to the use of the aforementioned alloy wire, the wire can be cut at the base of the ball by pulling it after the ball is adhered onto the conductor. However, when the wire is pulled, an electrode or a wire below the ball may be peeled from the substrate, together with the ball before cutting of the wire at the base occurs.
Still another technique is disclosed in Japanese Laid-Open Patent Publication No. 63-122133. In this publication, a method of connecting a semiconductor chip comprising the steps of forming a ball, pressing and adhering the ball onto an electrode, forming a projecting electrode by cutting a wire, and applying pressure to and electrically connecting a semiconductor chip having the projecting electrode to a conductor on a substrate through a member having anisotropic conductivity are disclosed.
In a semiconductor device manufactured in this manner, the semiconductor chip is electrically connected with the substrate through the member having anisotropic conductivity, and hence, there is a fear of a possible current leakage.
Finally, in issued U.S. Pat. Nos. 5,060,844 and 5,147,084, there is defined an electrical interconnection structure wherein a solder portion, e.g., paste, is positioned on a substrate, e.g., on its conductor pad, and a solder ball is then positioned on the paste. The solder ball has a higher melting point than the paste to allow paste reflow without distributing the ball integrity.
It is believed that a new and improved bump connection that can be produced relatively expeditiously on a mass production basis and thus at relatively lower costs than some of the foregoing processes would constitute an advancement in the art.
DISCLOSURE OF THE INVENTION
A primary object of the present invention is to provide a new and improved bump form of electrical connection which can be formed in a facile manner, including on a mass production basis.
It is another object to provide such a connection which can be formed to electrically couple very small components such as semiconductor chips to a circuitized substrate.
SUMMARY OF THE INVENTION
According to one aspect of the invention, there is provided a bump electrical connection comprising at least two contiguous metallic balls, each of a different metal than the other, positioned on a conductor of an electronic component in a stacked orientation such that one of the metallic balls is in direct contact with the conductor. For example purposes only, the bump can be formed by stacking a metallic ball of one kind of metal on a respective metallic ball of a different metal.
According to another aspect of the invention, there is provided a bump connection forming apparatus comprising a support member adapted for holding an electronic component therein wherein the component includes a conductor as part thereof, a capillary member including a hole therein through which a first metal wire may pass, a pair of clamps for clamping the first metal wire passed through the hole in the capillary member at a position spaced from the conductor, and a torch for heating a tip portion of the metallic wire to form a first metallic ball thereon, the apparatus adapted for moving the first formed ball and the electronic component toward one another such that the first metallic ball directly contacts the conductor and is secured thereto. Further, even three or more metallic balls can be stacked by this method, if desired. To further enhance the method, when a metallic ball (or balls) made of easily oxidized metal is(are) used, a reducing gas, an inert gas or a mixed gas is preferably blown onto the metallic ball so as not to allow the surface of the metallic ball to be oxidized. A further enhancement to this method is when a metallic ball is used that is made of an alloy, it is possible that the metallic wire to be used is so formed that each constituent metal forms a coat layer. In this situation, the unit volume of each layer of constituent metal is determined so that, when the metallic wire is melted to form a metallic ball, the constituent metals of the respective layers can be mixed with each other into a predetermined, desired composition. For example, the metallic wire may include a constituent metal having a much greater abrasion resistance among the constituent metals as the outermost layer.
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patent: 6
Sakurai Hiroyuki
Sakurai Keizo
Cuneo Kamand
Fraley Lawrence R.
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