Built-in memory current test circuit

Details Built-in memory current test circuit Built-in memory current test circuit

2006-07-07

2008-01-15

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Read/write circuit

Testing

C365S242000

Reexamination Certificate

active

07319625

ABSTRACT:
A built-in memory current test circuit to test a memory on a chip is disclosed, comprising a built-in self-test circuit and a dynamic current generation module. The built-in self-test circuit is disposed on the chip to receive and process a test signal and generate a control signal to control operation of the memory and a current control code. The dynamic current generation module, also disposed on the chip, produces a test current into the memory based on the current control code. The current switch time is reduced in the built-in memory current test circuit, and an integrated test combining functional and stress tests can thus be performed.

REFERENCES:
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patent: 6934205 (2005-08-01), Pandey et al.
patent: 2001/0009523 (2001-07-01), Maeno
patent: 2003/0002365 (2003-01-01), Sato et al.
patent: 2007/0047347 (2007-03-01), Byun et al.
patent: 2007/0064510 (2007-03-01), Zerbe et al.

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