Built-in debug feature for complex VLSI chip

Details Built-in debug feature for complex VLSI chip Built-in debug feature for complex VLSI chip

2006-09-19

2006-09-19

Le, Dieu-Minh (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S733000

Reexamination Certificate

active

07111199

ABSTRACT:
An apparatus comprising (i) a first circuit configured to generate one or more node signals at one or more internal nodes and (ii) a second circuit configured to present one or more of the node signals and a trigger signal in response to one or more control signals.

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