Building fully-depleted and partially-depleted transistors...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C438S977000, C257SE21704

Reexamination Certificate

active

07410841

ABSTRACT:
A method (10) of forming fully-depleted silicon-on-insulator (FD-SOI) transistors (150) and partially-depleted silicon-on-insulator (FD-SOI) transistors (152) on a semiconductor substrate (104) as part of an integrated circuit fabrication process is disclosed.

REFERENCES:
patent: 6222234 (2001-04-01), Imai
patent: 6537891 (2003-03-01), Dennison et al.
patent: 2004/0180478 (2004-09-01), Yang et al.
patent: 2004/0217420 (2004-11-01), Yeo et al.
patent: 2004/0217775 (2004-11-01), Turner
U.S. Appl. No. 11/091/078, filed Mar. 28, 2005, Tigelaar.

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