Building fully-depleted and bulk transistors on same chip

Details Building fully-depleted and bulk transistors on same chip Building fully-depleted and bulk transistors on same chip

2005-03-28

2008-08-12

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S977000, C257SE21642

Reexamination Certificate

active

07410840

ABSTRACT:
A method (10) of forming fully-depleted silicon-on-insulator (FD-SOI) transistors (150) and bulk transistors (152) on a semiconductor substrate (104) as part of an integrated circuit fabrication process is disclosed.

REFERENCES:
patent: 5740099 (1998-04-01), Tanigawa
patent: 6214694 (2001-04-01), Leobandung et al.
patent: 6531754 (2003-03-01), Nagano et al.
patent: 2004/0180478 (2004-09-01), Yang et al.
patent: 2004/0217420 (2004-11-01), Yeo et al.
patent: 2004/0217775 (2004-11-01), Turner
U.S. Appl. No. 11/091,249, filed Mar. 28, 2005, Tigelaar.

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