Bug segment decoder

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S026000, C710S108000, C710S004000

Reexamination Certificate

active

07080187

ABSTRACT:
Disclosed are a system and method of forwarding bus transactions from a source device to a target device in multiple data bus enviroment. A bridge is coupled between a first data bus and a second data bus while a target device is coupled to the first data bus at a data bus address. A decoder may provide bus segment information to the bridge independently of a bus transaction on the second data bus initiated by a source device. The bridge may comprise logic to forward the bus transaction on the first data bus to the target device based upon the bus segment information.

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PCI Local Bus Specification, Rev. 2.2, Dec. 18, 1998, Chapters 1-3.
PCI-to-PCI Bridge Architecture Specification, Rev. 1.1, Dec. 18, 1998, Chapters 1-4.

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