Bufferless writing of data to memory

Details Bufferless writing of data to memory Bufferless writing of data to memory

2005-12-06

2010-11-16

Alphonse, Fritz (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S764000, C714S752000

Reexamination Certificate

active

07836382

ABSTRACT:
This invention provides a processor for writing data contained in payload data of a data packet to memory. The processor may, in some embodiments, be a central processing unit of a memory tag. The processor does not include a write buffer. The processor may comprise a first register adapted to latch first data corresponding to a segment of the payload data; and a second register adapted to receive second data from the payload data to enable the validity of the data latched into the first register to be established before data is written to memory. A memory device, a method for writing data contained in payload data, a data packet, a method of writing data into a non-volatile memory and a memory tag may also be provided.

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