Buffering data that flows between buses operating at different f

Details Buffering data that flows between buses operating at different f Buffering data that flows between buses operating at different f

1997-10-27

2000-04-04

Shin, Christopher B.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

710 57, 710128, 710129, G06F 1300

Patent

active

060473398

ABSTRACT:
A "virtual FIFO" system for use in buffering data between transacting buses that transfer data at different rates includes a memory device and a controller that partitions the memory device into multiple regions, each of which is configured to operate as a distinct data buffer.

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