Buffered transfer of data blocks between memory and...

Details Buffered transfer of data blocks between memory and... Buffered transfer of data blocks between memory and...

2006-02-21

2006-02-21

Elmore, Stephen C. (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S147000, C711S154000, C711S156000, C711S170000

Reexamination Certificate

active

07003628

ABSTRACT:
A data transfer system uses a data buffer and individual control of each storage location within the data buffer for improved control of data block transfers. The storage locations are assigned deallocate, active, or valid assignment bands to enable transfer control of the data blocks within the system. The deallocated storage locations are returned to an allocation pool for use as a future resource, where the active and valid assignment bands remain unavailable until deallocated. Error checking and depth control prohibit consecutive allocation or deallocation assignments as well as overflow.

REFERENCES:
patent: 4334287 (1982-06-01), Wiedenman et al.
patent: 4794521 (1988-12-01), Ziegler et al.
patent: 6061765 (2000-05-01), Van Doren et al.
patent: 6078994 (2000-06-01), Carey
patent: 6237066 (2001-05-01), Pan et al.
patent: 6574720 (2003-06-01), Hopeman et al.

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