Buffered coscheduling for parallel programming and enhanced...

Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C712S010000, C712S011000, C712S016000, C712S018000, C712S019000, C713S502000, C713S600000

Reexamination Certificate

active

06993764

ABSTRACT:
A computer implemented method schedules processor jobs on a network of parallel machine processors or distributed system processors. Control information communications generated by each process performed by each processor during a defined time interval is accumulated in buffers, where adjacent time intervals are separated by strobe intervals for a global exchange of control information. A global exchange of the control information communications at the end of each defined time interval is performed during an intervening strobe interval so that each processor is informed by all of the other processors of the number of incoming jobs to be received by each processor in a subsequent time interval. The buffered coscheduling method of this invention also enhances the fault tolerance of a network of parallel machine processors or distributed system processors

REFERENCES:
patent: 5590284 (1996-12-01), Crosetto
patent: 5600843 (1997-02-01), Kato et al.
patent: 5781775 (1998-07-01), Ueno
patent: 5938775 (1999-08-01), Damani et al.
patent: 6061711 (2000-05-01), Song et al.
patent: 6173306 (2001-01-01), Raz et al.
Diefendorff, “Compaq Chooses SMT for Alpha: simultaneous Multithreading Exploits Instruction—and Thread-Level Parallelism,” Microprocessor Report, vol. 13, No. 16, Dec. 1999, pp. 1-7.
Keckler, et al., “Concurrent Event Handling through Multithreading,” IEEECS, vol. 48, No. 9, Sep. 1999, pp. 903-916.
Tseng et al., “ All-to-All Personalized Communication in a Wormhole-Routed Torus,” IEEECS, vol. 7, No. 5, May 1996,pp. 490-505.
Arpaci-Dusseau, et al., “Scheduling with Implicit Information in Distributed Systems,” Jun. 1998, pp. 1-11.
Eggers, et al., “Simultaneous Multithreading: A Platform for Next-Generation Processors,” IEEE Micro, Sep./Oct. 1997, pp. 12-19.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Buffered coscheduling for parallel programming and enhanced... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Buffered coscheduling for parallel programming and enhanced..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Buffered coscheduling for parallel programming and enhanced... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3525914

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.