Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2000-06-30
2003-09-23
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S027000
Reexamination Certificate
active
06624662
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to the field of compensating buffers for integrated circuits.
RELATED ART
As the complexity of personal computers and other systems employing integrated circuits increases, the need for precise output drivers has become more critical. Often an integrated circuit is required to drive signals with frequencies of 100 MHz or higher over printed circuit board traces several inches in length. Such traces behave as transmission lines making the data transfer difficult unless the impedance of the buffers compensates for the transmission line characteristics. Other factors enter into the need for compensated buffers, for instance, temperature and voltage vary during circuit operation which changes the characteristics of the buffers.
Numerous compensating output buffers are known such as shown in U.S. Pat. Nos. 5,578,971; 5,528,166; 4,975,598 and 4,768,170.
In co-pending application U.S. Ser. No. 09/299,771; filed Apr. 26, 1999, entitled “Method and Apparatus for Dual Mode Output Buffer Impedance Compensation,” now U.S. Pat. No. 6,166,563 (assigned to the assignee of the present application) a buffer disclosed with binary-weighted compensating driver legs which are selected during reset or initialization. External pull-up and pull-down resistors are used to allow a determination of which driver legs are needed. The present invention builds upon the buffer described in the above application as will be seen.
REFERENCES:
patent: 4768170 (1988-08-01), Hoff
patent: 4975598 (1990-12-01), Borkar
patent: 5194765 (1993-03-01), Dunlope et al.
patent: 5341045 (1994-08-01), Almulla
patent: 5463520 (1995-10-01), Nelson
patent: 5514951 (1996-05-01), Halim et al.
patent: 5528166 (1996-06-01), Iikbahar
patent: 5534801 (1996-07-01), Wu et al.
patent: 5578971 (1996-11-01), Minami et al.
patent: 5596285 (1997-01-01), Marbot et al.
patent: 5666078 (1997-09-01), Lamphier et al.
patent: 5798971 (1998-08-01), Larsen et al.
patent: 5898321 (1999-04-01), Ilkbahar et al.
patent: 5930271 (1999-07-01), Takahashi
patent: 6023174 (2000-02-01), Kirsch
patent: 6040714 (2000-03-01), Klein
patent: 6040845 (2000-03-01), Melo et al.
patent: 6052325 (2000-04-01), Merritt
patent: 6054881 (2000-04-01), Steonner
patent: 6072351 (2000-06-01), Sharpe-Geisler
patent: 6114895 (2000-09-01), Stephens
patent: 6141258 (2000-10-01), Kawasumi
patent: 6166563 (2000-12-01), Volk et al.
patent: 6272644 (2001-08-01), Urade et al.
patent: 6308289 (2001-10-01), Ahrens et al.
patent: 6326821 (2001-12-01), Gabara
patent: 0611053 (1994-08-01), None
patent: 0752677 (1994-08-01), None
patent: WO 98/31017 (1998-07-01), None
Thaddeus J. Gabara and Scott C. Knauer, “Digital Adjustable Resistors in CMOS for High-Performance Applications”, IEEE Journal of Solid State Circuits, vol. 27, No. 8, pp. 1176-1185 (Aug. 1992).
Andre DeHon, Thomas Knight, Jr., and Thomas Simon, “Automatic Impedance Control”, Proceeding of the 1993 IEEE International Solid-State Circuits Conference, pp. 164-165 (1993).
J.D. Trotter, S. Rekhi, V. Chava, and P.C. Kale, “A CMOS Low Voltage High Performance Interface”, Proceedings of the 7th IEEE International ASIC Conference and Exhibit, pp. 44-48 (Apr. 1994).
Toshiro Takahashi, Makio Uchida, Takahiko Takahashi, Ryozo Yoshino, Masakazu Yamamoto, and Nobuaki Kitamura, A CMOS Gate Array with 600Mb/s Simulatenous Bidirectional I/O Circuits, Proceedings of ICCSC ′95, vol. 30, No. 12, pp. 1544-1546 (1995).
Harold Pilo, Steve Lamphier, Fred Towler, and Richard Hee, “A 300Mhz, 3.3V 1 Mb SRAM Fabricated in a 0.5um CMOS Process”, Proceedings of the 1996 IEEE International Solid-State Circuits Conference, pp. 148-149 (1996).
Thomas F. Knight, Jr. and Alexander Krymm, “A Self-Terminating Low-Voltage Swing CMOS Output Driver”, IEEE Journal of Solid-State Circuits, vol. 23, No. 2, pp. 457-464 (Apr. 1988).
Paul R. Gray and Robert G. Meyer, “Analysis and Design of Analog Integrated Circuits”, 3rd Edition, John Wiley & Sons, pp. 201-204 (1993).
PCT Notification of Transmittal of The International Search Report or The Declaration for PCT Counterpart Application No. PCT/US01/19326 Containing International Search Report (Nov. 11, 2001).
Blakely , Sokoloff, Taylor & Zafman LLP
Cho James H.
Intel Corporation
Tokar Michael
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