Buffer pre-loading for memory service interruptions

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering

Reexamination Certificate

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Details

C710S047000, C710S048000, C710S054000, C710S056000, C710S057000, C711S100000, C711S101000, C711S117000, C711S170000

Reexamination Certificate

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06859851

ABSTRACT:
Methods and apparatus control the loading of a memory buffer. The memory buffer may have a watermark with a first watermark value and can receive an advance indication of a memory service interruption. Based at least in part on the received advance indication of the memory service interruption, the watermark can be modified to have a second watermark value different from the first watermark value.

REFERENCES:
patent: 5179707 (1993-01-01), Piepho
patent: 5210829 (1993-05-01), Bitner
patent: 5367689 (1994-11-01), Mayer et al.
patent: 5412780 (1995-05-01), Rushton
patent: 5542076 (1996-07-01), Benson et al.
patent: 5566315 (1996-10-01), Milillo et al.

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