Buffer of semiconductor memory apparatus

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C326S034000, C326S083000, C326S090000

Reexamination Certificate

active

07944240

ABSTRACT:
A buffer of a semiconductor memory apparatus includes a buffering section configured to generate an output signal by buffering an input signal. A mismatch compensation section generates a control voltage in correspondence with sizes of a second transistor of the same type as a first transistor constituting the buffering section, wherein the buffering section controls a transition time of the output signal in response to a level of the control voltage.

REFERENCES:
patent: 5999032 (1999-12-01), Wang et al.
patent: 6054874 (2000-04-01), Sculley et al.
patent: 7161513 (2007-01-01), Werner et al.
patent: 7269212 (2007-09-01), Chau et al.
patent: 7542507 (2009-06-01), Sohn
patent: 7635990 (2009-12-01), Ren et al.
patent: 2004/0150432 (2004-08-01), Poulton et al.
patent: 2007/0030055 (2007-02-01), Hasegawa
patent: 2007/0089009 (2007-04-01), Nishizawa
patent: 102003008832 (2003-11-01), None
patent: 100735754 (2007-06-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Buffer of semiconductor memory apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Buffer of semiconductor memory apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Buffer of semiconductor memory apparatus will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2685492

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.