Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2008-03-11
2008-03-11
Dang, Khanh (Department: 2111)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S026000
Reexamination Certificate
active
11097891
ABSTRACT:
A single copy memory sharing scheme between multiple endpoints in an interconnect architecture may use a buffer management method in an advanced switching fabric having multiple endpoints that divides a simple load and store memory aperture into a buffer descriptor and at least one data buffer, provides offset addressing in the buffer descriptor, and accesses the buffer descriptor by more than one endpoint to allow direct memory access with multiple endpoints in a simple load and store memory aperture. An apparatus may have a memory, and a device associated with the memory, the device to divide the memory into a buffer descriptor and at least one data buffer, and to store offset address information in the buffer descriptor such that another device can access a data buffer in the memory.
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Kapoor Randeep
Rooholamini Mo
Dang Khanh
Intel Corporation
Marger & Johnson & McCollom, P.C.
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