Buffer layers for device isolation of devices grown on silicon

Details Buffer layers for device isolation of devices grown on silicon Buffer layers for device isolation of devices grown on silicon

2009-02-13

2010-12-14

Ghyka, Alexander G (Department: 2812)

Active solid-state devices (e.g., transistors, solid-state diode

Thin active physical layer which is

Heterojunction

C257S189000, C257S190000, C257SE29249

Reexamination Certificate

active

07851781

ABSTRACT:
Various embodiments provide a buffer layer that is grown over a silicon substrate that provides desirable device isolation for devices formed relative to III-V material device layers, such as InSb-based devices, as well as bulk thin film grown on a silicon substrate. In addition, the buffer layer can mitigate parallel conduction issues between transistor devices and the silicon substrate. In addition, the buffer layer addresses and mitigates lattice mismatches between the film relative to which the transistor is formed and the silicon substrate.

REFERENCES:
patent: 6372981 (2002-04-01), Ueda et al.
patent: 7323764 (2008-01-01), Wallis
patent: 7494911 (2009-02-01), Hudait et al.
patent: 2003/0012249 (2003-01-01), Eisenbeiser
patent: 2004/0069991 (2004-04-01), Dunn et al.
patent: 2004/0169180 (2004-09-01), Udagawa
patent: 2004/0200523 (2004-10-01), King et al.
patent: 2008/0076235 (2008-03-01), Hudait et al.

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