Buffer for static in/static out dynamic speed

Details Buffer for static in/static out dynamic speed Buffer for static in/static out dynamic speed

1997-09-26

1999-09-28

Santamauro, Jon

Electronic digital logic circuitry

Interface

Current driving

326 93, 326 98, H03K 190175

Patent

active

059594683

ABSTRACT:
CMOS logic is coupled to dynamic logic which in turn is coupled to CMOS logic such than a clock is not required for the dynamic logic. Such a mixed static/dynamic buffer provides increased speed and fan-out. A buffer includes a dynamic circuit block coupled between static input and output blocks. The dynamic circuit block receives static true and complement input signals and provides dynamic output control signals responsive thereto. The dynamic circuit block dynamically changes the dynamic output control signals responsive to detecting a transition of the true input signal. The dynamic circuit block does not receive a clock signal. The static output block receives the dynamic output control signals and provides a static output signal responsive thereto. The static input block receives the true input signal and precharges the dynamic circuit block after the dynamic circuit block dynamically changes the dynamic output control signals.

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