Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-03-06
2007-03-06
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C710S310000
Reexamination Certificate
active
10769079
ABSTRACT:
A memory controller and method for managing the issuance of read and write requests to a system memory is provided. The number of outstanding read requests and write requests issued to the system memory are separately monitored and further issuance of read and write requests to the system memory is separately controlled based on the number of outstanding read and write requests, respectively. For example, the issuance of read and write requests can be managed by independently halting and resuming the issuance of read and write requests to the system memory to maintain the number of outstanding read requests between first and second read thresholds and to maintain the number of outstanding write requests between first and second write thresholds, respectively.
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Dorsey & Whitney LLP
Golden James
Peugh Brian R.
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