Buffer control circuit, semiconductor memory device for...

Details Buffer control circuit, semiconductor memory device for... Buffer control circuit, semiconductor memory device for...

2006-07-21

2008-11-18

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Particular write circuit

C365S189050

Reexamination Certificate

active

07453744

ABSTRACT:
A buffer control circuit, a semiconductor memory device for a memory module including the buffer control circuit, and a control method of the buffer control circuit, in which power consumption can be reduced. The buffer control circuit includes a first control signal generator that generates an internal buffer control signal in response to write latency signals and internal control signals, and a second control signal generator that generates a buffer control signal in response to the internal buffer control signal and a termination control signal. It is therefore possible to reduce unnecessary power consumption incurred by a data input buffer.

REFERENCES:
patent: 3621389 (1971-11-01), Murray
patent: 4771402 (1988-09-01), Nakabayashi
patent: 5268865 (1993-12-01), Takasugi
patent: 5930177 (1999-07-01), Kim
patent: 6466492 (2002-10-01), Ikeda

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