Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-07-22
1999-08-10
Maung, Zarni
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
712218, G06F 1300
Patent
active
059374306
ABSTRACT:
A buffer circuit comprises a storage unit for storing input data, a control unit for controlling an output of input data to an external circuit either directly or via the storage unit by writing the input data into the storage unit and then reading the input data out therefrom, and a selection unit for selecting for an output either the input data for direct output or the input data written into and then read out from the memory unit. The control unit determines whether input data exist and whether the external circuit is ready for receiving output data, and controls, based on a result of the determination, the output of the selection unit to the external circuit.
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Arai Hideo
Saitoh Minoru
Coulter Kenneth R.
Fujitsu Limited
Maung Zarni
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