Buffer circuit

Details Buffer circuit Buffer circuit

2007-11-13

2007-11-13

Le, Don (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S063000

Reexamination Certificate

active

11071349

ABSTRACT:
A buffer circuit for reducing leakage current and for protecting circuits from electrostatic discharge (“ESD”). A power supply circuit of an input/output buffer includes a transistor circuit connected to a high-potential power supply, a transistor circuit connected to a low-potential power supply, and a protection circuit connected between the two transistor circuits. The on-resistance of the transistor circuit is small. The transistor circuit generates a reference voltage close to the voltage of the high-potential power supply. The gate and source of the transistor circuits are connected to each other. This significantly reduces leakage current flowing from the reference voltage to the low-potential power supply. The protection circuit has resistance that lowers voltage at a high voltage terminal of the second transistor and reduces current flowing to the second transistor when a great amount of current flows through the first transistor circuit due to the occurrence of ESD.

REFERENCES:
patent: 5021691 (1991-06-01), Saito
patent: 5757225 (1998-05-01), Tobita
patent: 5783934 (1998-07-01), Tran
patent: 2004-7212 (2004-01-01), None

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