Buffer circuit

Details Buffer circuit Buffer circuit

1998-07-17

2000-04-25

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326112, 326 23, 326 27, 327437, H03K 190175, H03K 19094, H03K 19003, H03K 17687

Patent

active

060548762

ABSTRACT:
A buffer circuit includes a signal input terminal and a signal output terminal. A first operational amplifier includes a differential amplifier circuit having an input transistor of an N-channel MOS type. The first operational amplifier has an inverting input terminal and an output terminal connected to each other. The first operational amplifier has a non-inverting input terminal connected to the signal input terminal. A second operational amplifier includes a differential amplifier circuit having an input transistor of a P-channel MOS type. The second operational amplifier has an inverting input terminal and an output terminal connected to each other. The second operational amplifier has a non-inverting input terminal connected to the signal input terminal. A first switching device operates for connecting the output terminal of the first operational amplifier to the signal output terminal when a voltage of an input signal applied to the signal input terminal is in a range where the first operational amplifier is operative. A second switching device operates for connecting the output terminal of the second operational amplifier to the signal output terminal when the voltage of the input signal applied to the signal input terminal is in a range where the second operational amplifier is operative.

REFERENCES:
patent: 4719369 (1988-01-01), Asano et al.
patent: 5087834 (1992-02-01), Tsay
patent: 5166558 (1992-11-01), Ohsawa
patent: 5166635 (1992-11-01), Shih
patent: 5361041 (1994-11-01), Lish
patent: 5977796 (1999-11-01), Gabara

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