Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1995-12-20
1999-01-19
Coleman, Eric
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711100, G06F 1132
Patent
active
058624090
ABSTRACT:
During monitoring of a buffer configured so that expansion of an extent c of a buffer capacity takes place when the size of an unused region is reduced to a required expansion threshold value b, execution of a required calculation using an expansion threshold value b and buffer capacity extent c and c' (where c' is an initial value) for each point of time occurs. The reference values s1 and s2 corresponding to buffer capacities c and c' for each time point are determined and those reference values are used as the basis for screen display of expansion changes to the extent of the buffer capacity, thereby ensuring that a content of a display occurs corresponding to expansion for the extent of a buffer capacity. In addition, the use of the calculation formula for reference value s1 or s2 can be selected, while it is also possible to use a reference value (a fixed value ) which has been defined by the user.
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Sumida Hiroki
Yoshimoto Yasuo
Coleman Eric
Fujitsu Limited
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