Buffer

Details Buffer Buffer

2008-05-06

2008-05-06

Chang, Daniel (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

C326S095000, C327S295000, C365S222000

Reexamination Certificate

active

11275462

ABSTRACT:
A buffer is disclosed. The buffer may include a buffer controller for buffering a refresh signal enabled in an auto-refresh operation synchronously with an external clock signal, a logic circuit for performing a logic operation with respect to an output signal from the buffer controller and a specific signal to output a control signal, and an internal clock generator controlled by the control signal from the logic circuit for buffering the external clock signal and generating internal clock signals.

REFERENCES:
patent: 6426661 (2002-07-01), Curran
patent: 6657462 (2003-12-01), Dobberpuhl
patent: 6909314 (2005-06-01), Ahn
patent: 7154319 (2006-12-01), Kim
patent: 10-2003-0038265 (2003-05-01), None
patent: 10-2004-0100249 (2004-12-01), None

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