Broadcast state renaming in a microprocessor

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition

Reexamination Certificate

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C712S228000, C712S217000

Reexamination Certificate

active

06857062

ABSTRACT:
A microprocessor uses broadcast state renaming to reduce processing delays and microcode overhead which would otherwise result from rebroadcasts of state due to register renaming. The microprocessor comprises a memory execution unit, a microcode sequencer, and various functional units. The memory execution unit includes a segment register, content of which represents state of the processor. The microcode sequencer sets an identifier field in at least some microinstructions, indicating which of multiple copies of broadcast state are to be used in processing each such microinstruction. Each functional unit receives and internally stores multiple copies of broadcast state, each of which may correspond to a different renamed version of the segment register. Each functional unit selects, based on the identifier field of a microinstruction, one of its internally stored copies of broadcast state for use in processing the microinstruction.

REFERENCES:
patent: 5778243 (1998-07-01), Aipperspach et al.
patent: 6341347 (2002-01-01), Joy et al.
patent: 6629236 (2003-09-01), Aipperspach et al.
Chris Jesshope, “Implementing an Efficient Vector Instruction Set in a Chip Multi-Processor using Micro-Threaded Pipelines”, Proceedings of the 6thAustralasian Computer Systems Architecture Conference, IEEE, Jan. 29, 2001-Jan. 30, 2001, pp. 80-88.

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