Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-11-28
2006-11-28
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S305000, C710S107000, C714S006130
Reexamination Certificate
active
07143227
ABSTRACT:
A bus bridge apparatus for performing broadcasted writes to redundant memory subsystems in a network storage controller is disclosed. The bus bridge includes a PCI-X target that receives a write command on a first PCI-X bus on one side of the bridge. The target is coupled to two PCI-X masters coupled to primary and secondary memory subsystems by respective PCI-X buses on the other side of the bridge. A first FIFO buffers the write command data between the target and the first master, and a second FIFO buffers a copy of the data between the target and the second master. The first and second masters concurrently retransmit the write command on their respective PCI-X buses to the primary and secondary memory subsystems. However, the second master only retransmits if broadcasting is enabled and the write command address is in a broadcast address range known by the bus bridge.
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Davis E. Alan
Dot Hill Systems Corporation
Huffman James W.
Huynh Kim T.
Perveen Rehana
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