Bridges capable of controlling data flushing and methods for...

Details Bridges capable of controlling data flushing and methods for... Bridges capable of controlling data flushing and methods for...

2008-07-24

2010-10-26

Phan, Raymond N (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S053000, C710S057000, C711S135000, C711S153000

Reexamination Certificate

active

07822905

ABSTRACT:
A bridge capable of preventing data inconsistency is provided, in which a first master device outputs a flush request, a buffering unit buffers data or instructions, and a flush request control circuit records a buffer write pointer of the buffer according to the flush request and outputs a flush acknowledgement signal to the first master device in response of that a buffer read pointer of the buffering unit is identical to the recorded buffer write pointer.

REFERENCES:
patent: 5418755 (1995-05-01), Nguyen et al.
patent: 5533341 (1996-07-01), Schvester et al.
patent: 5936640 (1999-08-01), Horan et al.
patent: 5983304 (1999-11-01), Jin
patent: 6405276 (2002-06-01), Chen et al.
patent: 7475200 (2009-01-01), Melvin
patent: 7519796 (2009-04-01), Golla et al.

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