Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Patent
1991-06-12
1993-01-12
Jackson, Jr., Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
257532, H01L 2944, G01R 2726
Patent
active
051794330
ABSTRACT:
A breakdown evaluating test element insert an oxide film having thin thick portion and formed on a silicon wafer and a polysilicon film formed on the oxide film, in such a way that a capacitor is formed between the silicon wafer and the polysilicon film with the oxide film as dielectric. The area of the polysilicon film is made larger than that of the thin portion of the oxide film so that only the thin portion thereof is brought into breakdown at a predetermined probability by an electric field strength generated at the thin portion when an electric field is applied to the wafer and when no electron shower is used (no breakdown prevention countermeasure is taken) during ion implantation, for instance. Therefore, the effect of the electron shower can be confirmed by checking the resistivity of the thin oxide film portion after the wafer has been ion-implanted by using an electron shower.
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Wafer Charging and Beam Interactions In Ion Implantation, White et al., Solid State Technology/Feb. 1985, pp. 151-158.
A Method Of Surface Charge Neutralization During Ion Implantation, King et al., Nuclear Instruments and Methods in Physics Research B21 (1987) 396-399, North-Holland, Amsterdam (North-Holland Physics Publishing Division).
Misawa Hisanori
Shiozaki Masakazu
Jackson, Jr. Jerome
Kabushiki Kaisha Toshiba
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