Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-04-05
2005-04-05
Beausoliel, Robert (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S035000, C714S045000, C717S128000, C717S129000
Reexamination Certificate
active
06877113
ABSTRACT:
A semiconductor integrated circuit including a debugging support unit and a buffer memory for temporarily storing trace data, the debugging support unit comprising a break detection member that detects a break signal externally inputted and a break determining member that determines whether the break signal requests to shift to break processing after outputting all the trace data stored in the buffer memory or the break signal requests to shift to the break processing with immediately suspending trace data outputting.
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patent: 5491793 (1996-02-01), Somasundaram et al.
patent: 5809293 (1998-09-01), Bridges et al.
patent: 5978902 (1999-11-01), Mann
patent: 2-14332 (1990-01-01), None
Saruwatari Toshiaki
Tagawa Koutarou
Beausoliel Robert
Fujitsu Limited
Matthew Aaron D
Staas & Halsey , LLP
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