Break board debugging device

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Details

C717S129000

Reexamination Certificate

active

06954878

ABSTRACT:
A microcomputer11with a debug circuit11bimplemented therein for realizing an on-chip debugging function is mounted on a target board10in which a variety of buses15are led out and connected to a break board30. The break board30is provided with a break condition storage section31and a break signal generation section32. Break conditions are written in the break condition storage section31from the side of a debugger20through the debug circuit11b, the CPU11aand the various buses15. Then, a user program stored in a ROM12is executed. The break signal generation section32monitors signals on the various buses15, and outputs a break generation signal30awhen the signals on the various buses15coincide with the break condition. The execution of the user program is interrupted (stopped) based on the break generation signal30a.

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