Branch predictor with saturating counter and local branch...

Details Branch predictor with saturating counter and local branch... Branch predictor with saturating counter and local branch...

2006-06-27

2006-06-27

Chan, Eddie (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

Reexamination Certificate

active

07069426

ABSTRACT:
An embodiment of the invention is directed to a dynamic branch prediction method in which a first taken
ot-taken prediction is provided responsive to an address using a saturating counter branch predictor. A second taken
ot-taken prediction responsive to the address resulting in a hit in a local branch history table is provided. In addition, a hit/miss indication for the address is provided. The second prediction is selected for the address if the indication is a hit, and the first prediction is selected if the indication is a miss.

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Hennessy and Patterson, Computer Architecture—A Quantitative Approach, 2nd Edition, p. 162, 163, and 167.
Driesen et al., “The Cascaded Predictor: Economical and Adaptive Branch Target Predictive,” Dec. 1998, pp. 1-10.
T. Yeh & Y. N. Patt, “Alternative Implementations of Two-Level Adaptive Branch Prediction”, Proc. 19th Symposium on Computer Architecture (May 1992), Gold Coast, Australia, pp. 124-134.
J. L. Hennessy & D. A. Patterson, “Computer Architecture A Quantitative Approach”, 2d Edition, pp. 262-271.

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