Branch prediction apparatus having branch target buffer for effe

Electrical computers and digital processing systems: processing – Processing control – Branching

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Details

712239, 712240, 713501, G06F 938, G06F 942

Patent

active

060444592

ABSTRACT:
To provide a branch prediction apparatus and its method that accesses BTB using IP of an instruction whose interval between the branch instruction is the smallest, on the basis of a branch instruction's fetch among the instructions that can be fetched prior to one cycle, and also that fetches the branch target after N cycle, after BTB accessing, storing the information of the cycle interval N1 between the branch access instruction and branch instruction inside BTB entry.

REFERENCES:
patent: 5442756 (1995-08-01), Grochowski et al.
patent: 5790845 (1998-08-01), Shimada et al.
patent: 5848269 (1998-12-01), Hara

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