BPSG planarization method having improved planarity and reduced

Details BPSG planarization method having improved planarity and reduced BPSG planarization method having improved planarity and reduced

1999-07-28

2000-04-25

Bowers, Charles

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

438760, 438633, 438631, H01L 21304

Patent

active

060543973

ABSTRACT:
A method for improving the planarization of a BPSG layer over a semiconductor substrate, where the substrate contains underlying structures, is disclosed. The method comprises the steps of: forming a first borophosphosilicate glass (BPSG) layer over and between the underlying structures; reflowing the first BPSG layer using a thermal process; performing a chemical mechanical polishing (CMP) step on the first BPSG layer; forming a second BPSG layer over the first BPSG layer; and reflowing the second BPSG layer using a thermal process.

REFERENCES:
patent: 5223734 (1993-06-01), Lowrey et al.
patent: 5633211 (1997-05-01), Imai et al.

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